Our Swiss client, a leading worldwide supplier of high performance optical sensor solutions is in search of a SR Design Digital Verification Engineer to join a development team of leading edge 3D solutions in an international environment.
Responsibilities:
· Design verification and validation of integrated circuits, using both directed tests and constrained random regressions
· Primary focus is digital design verification, proficiency with mixed signal design verification and creation / validation of models are strong advantages
· Proficiency in System Verilog and UVM, including: Writing checkers and assetions, customizing constraints, getting functional coverage collection using cover groups, etc.
· Technical and team leadership – both within the internal project DV team, but also directly supporting demanding customers.
· Creation of test benches and automated verification simulations
· Performing block level and top level design verification
· Generation of relevant documentation (DV Plan, DV execution plan, customer reviews, etc.)
· Create and patent new IPs
· Supervise junior engineers
Required Skills & Knowledge:
· MSc in Electrical Engineering
· 10 years of experience –emphasis in Design Verification or similar
· Proven experience with system Verilog / UVM based DV experience
· Experience with relevant CAD tools (used for digital IC design and verification)Assertive team player, able to solve complex problems under high pressure in a complex environment
· Able to communicate effectively and to the point in front of customers and internal stakeholders
· Fluency in English: written and verbal
- Required Skills:
- • MSc in Electrical Engineering
• 10 years of experience –emphasis in Design Verification or similar
• Fluency in English: written and verbal
• Design verification and validation of integrated circuits, using both directed tests and constrained random regressions.
If interested, please share your CV at iuliana@euroasiarecruiting.com.
EuroAsia Recruiting 